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Clare Boothe Luce Assistant Professor of Computer Science and Electrical and Computer Engineering
Appointments and Affiliations
- Assistant Professor of Computer Science
- Assistant Professor of Electrical and Computer Engineering
- Office Location: D304 Lsrc, 308 Research Drive, Durham, NC 27708
- Email Address: email@example.com
- Ph.D. Columbia University, 2014
I enjoy solving difficult problems surrounding computations with the goal to process large volumes of data efficiently. My research interests include computer architecture and microarchitecture, hardware-software co-designs, accelerators, and emerging application domains ― especially those in big data analytics such as genomics, graphs, and databases. One of my research goals is to greatly simplify the design, deployment, and usage of custom hardware and to leverage this research in hardware acceleration to advance state-of-the-art research in the healthcare domain as well as other natural sciences.
- COMPSCI 250D: Computer Architecture
- COMPSCI 391: Independent Study
- COMPSCI 590: Advanced Topics in Computer Science
- ECE 250D: Computer Architecture
- ECE 392: Projects in Electrical and Computer Engineering
- ECE 493: Projects in Electrical and Computer Engineering
- ECE 494: Projects in Electrical and Computer Engineering
- ECE 590: Advanced Topics in Electrical and Computer Engineering
In the News
- New Faculty, Bold Thinking (Oct 15, 2019 | Duke Stories)
- Ham, TJ; Lee, Y; Seo, SH; Song, UG; Lee, JW; Bruns-Smith, D; Sweeney, B; Asanovic, K; Oh, YH; Wills, LW, Accelerating Genomic Data Analytics with Composable Hardware Acceleration Framework, Ieee Micro, vol 41 no. 3 (2021), pp. 42-49 [10.1109/MM.2021.3072385] [abs].
- Wills, LW; Swaminathan, K, Guest Editorial: IEEE TC Special Issue on Domain-Specific Architectures for Emerging Applications, Ieee Transactions on Computers, vol 69 no. 8 (2020), pp. 1096-1098 [10.1109/TC.2020.3002674] [abs].
- Ham, TJ; Bruns-Smith, D; Sweeney, B; Lee, Y; Seo, SH; Song, UG; Oh, YH; Asanovic, K; Lee, JW; Wills, LW, Genesis: A Hardware Acceleration Framework for Genomic Data Analysis, Proceedings International Symposium on Computer Architecture, vol 2020-May (2020), pp. 254-267 [10.1109/ISCA45697.2020.00031] [abs].
- Wu, L; Bruns-Smith, D; Nothaft, FA; Huang, Q; Karandikar, S; Le, J; Lin, A; Mao, H; Sweeney, B; Asanovic, K; Patterson, DA; Joseph, AD, FPGA Accelerated INDEL realignment in the cloud, Proceedings 25th Ieee International Symposium on High Performance Computer Architecture, Hpca 2019 (2019), pp. 277-290 [10.1109/HPCA.2019.00044] [abs].
- Ham, TJ; Wu, L; Sundaram, N; Satish, N; Martonosi, M, Graphicionado: A high-performance and energy-efficient accelerator for graph analytics, Proceedings of the Annual International Symposium on Microarchitecture, Micro, vol 2016-December (2016) [10.1109/MICRO.2016.7783759] [abs].