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Hai "Helen" Li

Li

Clare Boothe Luce Professor of Electrical and Computer Engineering

Research Interests:

Neuromorphic computing systems
Machine learning acceleration and trustworthy AI
Emerging memory technologies, circuit, and architecture
Low power circuits and systems

Appointments and Affiliations

  • Professor in the Department of Electrical and Computer Engineering
  • Professor of Computer Science

Contact Information

  • Office Location: Rm130 Hudson Hall, 100 Science Dr., Durham, NC 27701
  • Office Phone: (919) 660-1373
  • Email Address: hai.li@duke.edu
  • Websites:

Education

  • Ph.D. Purdue University, 2004

Research Interests

Neuromorphic computing systems
Machine learning acceleration and trustworthy AI
Emerging memory technologies, circuit and architecture
Low power circuits and systems

Awards, Honors, and Distinctions

  • Best Paper Award for the paper titled “Classification Accuracy Improvement for Neuromorphic Computing Systems with One-level Precision Synapses”. Asia and South Pacific Design Automation Conference (ASPDAC). 2017
  • Fulton C. Noss Faculty Fellow. University of Pittsburgh. 2016
  • Best Paper Award for the paper titled “Quantitative Modeling of Racetrack Memory - A Tradeoff among Area, Performance, and Power”. Asia and South Pacific Design Automation Conference (ASPDAC). 2015
  • Air Force Summer Faculty Fellowship Program Award (AF-SFFP). AFRL/RITC. 2015
  • Best Paper Award for the paper titled “A Weighted Sensing Scheme for ReRAM-based Cross-point Memory Array”. IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 2014
  • Best Paper Award for the paper titled “Coordinating Prefetching and STT-RAM based Last-level Cache Management for Multicore Systems”. Proceedings of the 23rd ACM International Conference on Great Lakes Symposium on VLSI (GLSVLSI). 2013
  • Air Force Visiting Faculty Research Program (VFRP) Fellowship. AFRL/RIB. 2013
  • DARPA Young Faculty Award. Defense Advanced Research Projects Agency (DARPA). 2013
  • NSF Career Award. National Science Foundation (NSF). 2012
  • Air Force Summer Faculty Fellowship Program Award (AF-SFFP). AFRL/RITC. 2011
  • Best Paper Award for the paper titled “Combined Magnetic- and Circuit-level Enhancements for the Nondestructive Self-Reference Scheme of STT-RAM”. ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED). 2010
  • Best Paper Award for the paper titled “Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)”. the 9th International Symposium on Quality Electronic Design (ISQED). 2008

Courses Taught

  • ECE 292: Projects in Electrical and Computer Engineering
  • ECE 391: Projects in Electrical and Computer Engineering
  • ECE 493: Projects in Electrical and Computer Engineering
  • ECE 494: Projects in Electrical and Computer Engineering
  • ECE 590: Advanced Topics in Electrical and Computer Engineering
  • ECE 661: Computer Engineering Machine Learning and Deep Neural Nets
  • ECE 891: Internship
  • ECE 899: Special Readings in Electrical Engineering

In the News

Representative Publications

  • Joardar, BK; Doppa, JR; Li, H; Chakrabarty, K; Pande, PP, Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators, Acm Transactions on Embedded Computing Systems, vol 20 no. 5s (2021), pp. 1-23 [10.1145/3476986] [abs].
  • Zhang, J; Huang, Y; Yang, H; Martinez, M; Hickman, G; Krolik, J; Li, H, Efficient FPGA Implementation of a Convolutional Neural Network for Radar Signal Processing, 2021 Ieee 3rd International Conference on Artificial Intelligence Circuits and Systems, Aicas 2021 (2021) [10.1109/AICAS51828.2021.9458573] [abs].
  • Hu, W; Chang, CH; Sengupta, A; Bhunia, S; Kastner, R; Li, H, An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools, Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems, vol 40 no. 6 (2021), pp. 1010-1038 [10.1109/TCAD.2020.3047976] [abs].
  • Joardar, BK; Doppa, JR; Pande, PP; Li, H; Chakrabarty, K, AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3-D Architecture, Ieee Transactions on Computer Aided Design of Integrated Circuits and Systems, vol 40 no. 5 (2021), pp. 971-984 [10.1109/TCAD.2020.3013194] [abs].
  • Kim, B; Hanson, E; Li, H, An Efficient 3D ReRAM Convolution Processor Design for Binarized Weight Networks, Ieee Transactions on Circuits and Systems Ii: Express Briefs, vol 68 no. 5 (2021), pp. 1600-1604 [10.1109/TCSII.2021.3067840] [abs].