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Daniel J. Sorin


Professor of Electrical and Computer Engineering

Dr. Daniel Sorin is the Addy Professor of Electrical and Computer Engineering and of Computer Science. His research interests are primarily in computer architecture and dependability.

Appointments and Affiliations

  • Professor of Electrical and Computer Engineering
  • Bass Fellow
  • Professor of Computer Science

Contact Information

  • Office Location: 209C Hudson Hall, Durham, NC 27708
  • Office Phone: (919) 660-5439
  • Email Address:
  • Websites:


  • Ph.D. University of Wisconsin - Madison, 2002
  • M.S. University of Wisconsin - Madison, 1998
  • B.S. Duke University, 1996

Research Interests

Computer architecture, designing microarchitectures so that they are easier to verify, improving computer system fault tolerance, developing memory systems for multicore processors, and designing special-purpose accelerators

Awards, Honors, and Distinctions

  • Program Chair of HiPEAC 2017. HiPEAC. 2017
  • Co-chair of selection committee for IEEE Micro's Top Picks 2016. IEEE Micro. 2016
  • Associate Editor in Chief. Computer Architecture Letters. 2015
  • IEEE Micro Top Pick. IEEE Micro. 2015
  • Best Paper Award. 20th International Symposium on High Performance Computer Architecture. 2014
  • IEEE Micro Top Pick. IEEE Micro. 2011
  • Lois and John L. Imhoff Distinguished Teaching Award. Pratt School of Engineering. 2011
  • ACM Senior Member. Association for Computing Machinery. 2009
  • Eta Kappa Nu. Unknown. 2008
  • Intel Graduate Fellowship. Unknown. 2008
  • NSF Early CAREER Award. National Science Foundation. 2008
  • Outstanding Graduate Research Award. University of Wisconsin. 2008
  • Phi Beta Kappa. Unknown. 2008
  • Tau Beta Pi. Unknown. 2008
  • Top of 2004 - Nanocomputing Research. Technology Research News. 2008
  • Faculty Early Career Development (CAREER) Program. National Science Foundation. 2005

Courses Taught

  • COMPSCI 250D: Computer Architecture
  • ECE 250D: Computer Architecture
  • ECE 552: Advanced Computer Architecture I
  • ECE 554: Fault-Tolerant and Testable Computer Systems
  • ECE 652: Advanced Computer Architecture II

In the News

Representative Publications

  • Archer, S; Mappouras, G; Calderbank, R; Sorin, D, Foosball Coding: Correcting Shift Errors and Bit Flip Errors in 3D Racetrack Memory, Proceedings 50th Annual Ieee/Ifip International Conference on Dependable Systems and Networks, Dsn 2020 (2020), pp. 331-342 [10.1109/DSN48063.2020.00049] [abs].
  • Oswald, N; Nagarajan, V; Sorin, DJ, HieraGen: Automated Generation of Concurrent, Hierarchical Cache Coherence Protocols, Proceedings International Symposium on Computer Architecture, vol 2020-May (2020), pp. 888-899 [10.1109/ISCA45697.2020.00077] [abs].
  • Sorin, DJ, Computer Architecture for Orbital Edge Computing, Computer, vol 53 no. 4 (2020), pp. 7-8 [10.1109/MC.2020.2969673] [abs].
  • Mehrabi, A; Manocha, A; Lee, BC; Sorin, DJ, Prospector: Synthesizing Efficient Accelerators via Statistical Learning, Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, Date 2020 (2020), pp. 151-156 [10.23919/DATE48585.2020.9116473] [abs].
  • Murray, S; Floyd-Jones, W; Konidaris, G; Sorin, DJ, A programmable architecture for robot motion planning acceleration, Proceedings of the International Conference on Application Specific Systems, Architectures and Processors, vol 2019-July (2019), pp. 185-188 [10.1109/ASAP.2019.000-4] [abs].